RE: found the constant for divide-only circuit!

[Paul Koning <ni1d@arrl.net>]

Excerpt of message (sent 13 December 2001) by CAVANNA,VICENTE V (A-Roseville,ex1):
> I have modified the preferred implementation (simultaneous multiply-divide
> circuit) to include the control logic as Paul suggested (similar to ethernet
> spec). By showing this circuit the iSCSI spec becomes less ambiguous and,
> just maybe, Luben and Paul will be happy men :-).

This is good.

I have one comment: I'd call this an "example" implementation rather
than "preferred".  In fact, it is quite likely not the preferred
implementation if you have to go flying along at several gigabits per
second...  And, since it's an example, I'd put it in some appendix.

There are other example implementations one might point to, for
example the 4 bits at a time table driven approach documented in the
VAX architecture manual, or the 8 bits at a time approach documented
in a paper by Stuart Wecker from sometime before 1980.  I should have
the former somewhere; the latter I don't have but I can probably come
up with a reference to it.

     paul