PDL ABSTRACT

Evaluating STT-RAM as an Energy-Efficient Main Memory Alternative

2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2013), April 21-23, 2013, Austin, TX.

Emre Kultursay*, Mahmut Kandemir*, Anand Sivasubramaniam*, Onur Mutlu

Carnegie Mellon University
5000 Forbes Ave.
Pittsburgh, PA 15213

*Pennsylvania State University

http://www.pdl.cmu.edu/

In this paper, we explore the possibility of using STT-RAM technology to completely replace DRAM in main memory. Our goal is to make STT-RAM performance comparable to DRAM while providing substantial power savings. Towards this goal, we first analyze the performance and energy of STTRAM, and then identify key optimizations that can be employed to improve its characteristics. Specifically, using partial write and row buffer write bypass, we show that STT-RAM main memory performance and energy can be significantly improved. Our experiments indicate that an optimized, equal capacity STTRAM main memory can provide performance comparable to DRAM main memory, with an average 60% reduction in main memory energy.

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