PARALLEL DATA LAB 

PDL Abstract

Be Fast, Cheap and in Control with SwitchKV

In 13th USENIX Symposium on Networked Systems Design and Implementation (NSDI'16), Santa Clara, CA, March 2016.

Xiaozhou Li*, Raghav Sethi*, Michael Kaminsky†, David G. Andersen, Michael J. Freedman*

Carnegie Mellon University
* Princeton University
† Intel Labs

http://www.pdl.cmu.edu/

SwitchKV is a new key-value store system design that combines high-performance cache nodes with resourceconstrained backend nodes to provide load balancing in the face of unpredictable workload skew. The cache nodes absorb the hottest queries so that no individual backend node is over-burdened. Compared with previous designs, SwitchKV exploits SDN techniques and deeply optimized switch hardware to enable efficient contentbased routing. Programmable network switches keep track of cached keys and route requests to the appropriate nodes at line speed, based on keys encoded in packet headers. A new hybrid caching strategy keeps cache and switch forwarding rules updated with low overhead and ensures that system load is always well-balanced under rapidly changing workloads. Our evaluation results demonstrate that SwitchKV can achieve up to 5× throughput and 3× latency improvements over traditional system designs.

FULL PAPER: pdf