PDL ABSTRACT

Disk Reads with DRAM Latency

Appears in Third Workshop on Workstation Operating Systems, April, 1992, pp. 126-131.

Garth A. Gibson, R. Hugo Patterson*, M. Satyanarayanan

School of Computer Science
Department of Electrical and Computer Engineering*
Carnegie Mellon University
Pittsburgh, PA 15213

http://www.pdl.cmu.edu/

The most difficult and frequently most important challenge for high performance file access is the achievement of low latency cache misses. We propose to explore the utility and feasibility of using file access hints to schedule overlapped prefetching of file data. Hints may be issued explicitly by programmers, automatically by compilers, speculatively by parent tasks such as shells and makes, or historically by previously profiled executions. Our research will also address the thorny issues of hint specification, memory resource management, imprecise and incorrect hints, and appropriate interfaces for propogating hints through and to effected application, operating system, file system, and device specific modules. We begin our research with a detailed examination of two applications with large potential for improvement: compilation of multiple module software systems and scientific simulation using very large grid state files.

FULL PAPER: pdf / postscript

 

 

 

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