RE: iSCSI Data Integrity - Digests

[Black_David@emc.com]

> I am not sure I understand the difficulty imposed by adler32 with respect
to
> hardware. Optimal assembly code looks different with about three
> instructions per byte. 

I believe the concern is about how fast a hot-rodded ASIC can go.
The arithmetic involved in CRCs doesn't have to cope with carry/borrow
propagation in contrast to the arithmetic involved in the Adler-32
modulus.

--David
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