RE: iSCSI Data Integrity - Digests

["Douglas Otis" <dotis@sanlight.net>]

David,

Once dealing with 32-bit wide memory accesses, adding and subtracting are
hardly difficult operations nor more difficult than that needed for CRC.
Adler32 does not involve division in most implementations and requires few
gates between states so minor pipe-lining easily handles any perceived
difficulty.  You will notice that s2 does not feed into s1.

Here is the repetitive operation of adler32:

     s1 += *buf++;
     if (s1 >= BASE)
         s1 -= BASE;
     s2 += s1;
     if (s2 >= BASE)
         s2 -= BASE;

Doug


> > I am not sure I understand the difficulty imposed by adler32
> with respect
> to
> > hardware. Optimal assembly code looks different with about three
> > instructions per byte.
>
> I believe the concern is about how fast a hot-rodded ASIC can go.
> The arithmetic involved in CRCs doesn't have to cope with carry/borrow
> propagation in contrast to the arithmetic involved in the Adler-32
> modulus.
>
> --David
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> David L. Black, Senior Technologist
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