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    Re: iSCSI: [Fwd: Crc-32c example in iSCSI spec]



    
    Here are some clarifications about how the CRC is to be calculated (Network
    byte order etc.),
    the assumptions on data flow, the value of the CRC register for a good
    segment and a corrected set of examples:
    
    The Appendix A part will read:
    
       The following table lists cyclic integrity checksums that can be
       negotiated for the digests and MUST be implemented by every iSCSI
       initiator and target. Note that these digest options have only error
       detection significance.
    
       +---------------------------------------------+
       | Name          | Description     | Generator |
       +---------------------------------------------+
       | crc-32C       | 32 bit CRC      | 11EDC6F41 |
       +---------------------------------------------+
       | none          | no digest                   |
       +---------------------------------------------+
    
       The generator polynomial for this digest is given in hex-notation, for
       example 3b stands for 0011 1011 - the polynomial x**5+X**4+x**3+x+1.
    
       The generator polynomial selected is evaluated in [Castagnioli93].
       When using the CRC the CRC register must be initialized to all 1s
       (0xFFFFFFFF) and the CRC bits must be complemented before transmission.
       Padding bytes, when present, in a segment covered by a CRC, should be
       set to 0 and are included in the CRC. The CRC should be calculated as
       follows:
    
          - data are assumed to be  in the numbering order that appears in the
          draft - start with byte 0 bit 0 continue byte 1 bit 0 etc. (Big
          Endian on bytes / Little Endian on bits)
          - the CRC register is initialized with all 1s (equivalent to
          complementing the first 32 bits of the message)
          - the n PDU bits are considered coefficients of a polynomial M(x) of
          order n-1, with bit 0 of byte 0 being x^(n-1)
          - the polynomial is multiplied by x^32 and divided by G(x)- the
          generator polynomial - producing a remainder R(x) of degree <= 31
          - the coefficients of R(x) are considered a 32 bit sequence
          - the bit sequence is complemented and the result is the CRC
          - after the last bit of the original segment the CRC bits are
          transmitted with x^31 first followed by x^30 etc. ( whenever examples
          are given the value to be specified in examples follows the same
          rules of representation as the rest of this document)
          - a receiver of a "good" segment (data or header) built using the
          generator 0x11EDC6F41 will end-up having in the CRC register the
          value 0x1c2d19ed (this a register value and not a word as outlined in
          this draft)
    
    
    CRC Examples will read:
    
    01   CRC Examples
    
       N.B. all Values are Hexadecimal
    
       32 bytes of zeroes:
    
         Byte:        0  1  2  3
    
            0:       00 00 00 00
          ...
           28:       00 00 00 00
    
          CRC:       aa 36 91 8a
    
       32 bytes of ones:
    
         Byte:        0  1  2  3
    
            0:       ff ff ff ff
          ...
           28:       ff ff ff ff
    
          CRC:       43 ab a8 62
    
       32 bytes of incrementing 00..1f:
    
         Byte:        0  1  2  3
    
            0:       00 01 02 03
          ...
           28:       1c 1d 1e 1f
    
          CRC:       4e 79 dd 46
    
       32 bytes of decrementing ff..e0:
    
         Byte:        0  1  2  3
    
            0:       ff fe fd fc
          ...
           28:       e3 e2 e1 e0
    
          CRC:       5c db 3f 11
    
    
    


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Last updated: Tue Sep 04 01:03:59 2001
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