PARALLEL DATA LAB 

PDL Abstract

Improving Index Performance through Prefetching

Proceedings of SIGMOD 2001, Santa Barbara, CA, May 2001. Supercedes technical report CMU-CS-00-177,
December 2000.

Shimin Chen, Phillip B. Gibbons, and Todd C. Mowry

School of Computer Science
Carnegie Mellon University
Pittsburgh, PA 15213

http://www.pdl.cmu.edu/

This paper proposes and evaluates Prefetching B+-Trees (pB+-Trees), which use prefetching to accelerate two important operations on B+-Tree indices: searches and range scans. To accelerate searches, pB+-Trees use prefetching to effectively create wider nodes than the natural data transfer size: e.g., eight vs. one cache lines or disk pages. These wider nodes reduce the height of the B+-Tree, thereby decreasing the number of expensive misses when going from parent tochild without significantly increasing the cost of fetching a given node. Our results show that this technique speeds up search and update times by a factor of 1.2-1.5 for main-memory B+-Trees. In addition, it outperforms and is complementary to "Cache-Sensitive B+-Trees." To accelerate range scans, pB+-Trees provide arrays of pointers to their leaf nodes. These allow the pB+-Tree to prefetch arbitrarily far ahead, even for nonclustered indices, thereby hiding the normally expensive cache misses associated with traversing the leaves within the range. Our results show that this technique yields over a sixfold speedup on range scans of 1000+ keys. Although our experimental evaluation focuses on main memory databases, the techniques that we propose are also applicable to hiding disk latency.

 

FULL PAPER: pdf / postscript
ORIGINAL TR VERSION OF THIS PAPER: pdf / postscript