PARALLEL DATA LAB 

PDL Abstract

MANIC: A 19µW @ 4MHz, 256 MOPS/mW, RISC-V Microcontroller with Embedded MRAM Main Memory and Vector-Dataflow Co-Processor in 22nm Bulk FinFET CMOS

IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, May 21-25, 2023.

Graham Gobieski, Oguz Atli, Cagri Erbagci, Ken Mai, Nathan Beckmann, Brandon Lucia

Carnegie Mellon University

http://www.pdl.cmu.edu

Whether powered by a battery or energy harvested from the environment, low-power (LP) sensor devices require extreme energy efficiency. These sorts of devices are becoming pervasive, running increasingly sophisticated applications in inhospitable environments. We present MANIC, an energy-efficient microcontroller (MCU) augmented with a vector-dataflow (VDF) co-processor. The testchip taped out on a 22nm bulk finFET CMOS process demonstrates that MANIC is 60% more energyefficient than a baseline, scalar, low-power MCU, achieving peak efficiency of 256 MOPS/mW (2.6 prior work) while consuming only 19.1μW (@4MHz). To make the system viable for intermittently powered applications that require non-volatile storage, MANIC includes a 256KB embedded MRAM.

FULL PAPER: pdf