PARALLEL DATA LAB 

PDL Abstract

FairyWREN: A Sustainable Cache for Emerging Write-Read-Erase Flash Interfaces

18th USENIX Symposium on Operating Systems Design and Implementation (OSDI '24), July 10–12, 2024. Santa Clara, CA, USA.

Sara McAllister, Yucong “Sherry” Wang, Benjamin Berg*, Daniel S. Berger†, George Amvrosiadis, Nathan Beckmann, Gregory R. Ganger

Carnegie Mellon University
* UNC, Chapel Hill
† Microsoft Azure and University of Washington

http://www.pdl.cmu.edu/

Datacenters need to reduce embodied carbon emissions, particularly for flash, which accounts for 40% of embodied carbon in servers. However, decreasing flash’s embodied emis- sions is challenging due to flash’s limited write endurance, which more than halves with each generation of denser flash. Reducing embodied emissions requires extending flash life- time, stressing its limited write endurance even further. The legacy Logical Block-Addressable Device (LBAD) inter- face exacerbates the problem by forcing devices to perform garbage collection, leading to even more writes.

Flash-based caches in particular write frequently, limiting the lifetimes and densities of the devices they use. These flash caches illustrate the need to break away from LBAD and switch to the new Write-Read-Erase iNterfaces (WREN) now coming to market. WREN affords applications con- trol over data placement and garbage collection. We present FairyWREN1, a flash cache designed for WREN. FairyWREN reduces writes by co-designing caching policies and flash garbage collection. FairyWREN provides a 12.5× write re- duction over state-of-the-art LBAD caches. This decrease in writes allows flash devices to last longer, decreasing flash cost by 35% and flash carbon emissions by 33%.

FULL PAPER: pdf
TALK SLIDES & VIDEO: Youtube